WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ THE ROLE: The full custom IC layout group is looking for a candidate to design the layout for digital and analog circuits based on schematics using industry leading CAD tools and cutting edge foundry technology. Examples of layout designed by our team include Phase Locked Loop (PLL), Delay Locked Loop (DLL), Voltage Controlled Oscillator (VCO), Digital to Analog Converter (DAC), Current Regulator, High Speed Differential Signaling circuitry, Droop Detect, and Die Crack Monitor. Proficiency in 2D layout design while being able to visualize in 3D space are traits ideal for this position. It is useful to have knowledge of digital and analog circuitry at the CMOS transistor level. This team is essential to the success of AMD as a cutting edge company. You will be working on some of the most exciting projects the industry has to offer. AMD's products are featured in many products ranging from Laptops, to servers to major game consoles. It is a very exciting environment and you will be working with the very best cutting edge technology. THE PERSON: The person will be able to work with cross functional teams. Will have strong problem solving skills and be proactive to resolve issues. KEY RESPONSIBILITIES: As a candidate, you will be able to see through the different stages of project development for a complete analog design – from initial floor planning and routing of low level logic gates to top level integration of numerous blocks and ultimately, project tape out related tasks. Day to day responsibilities include managing junior/contract layout resources in order to complete basic lower level cells, assembly of these lower level cells into macros/blocks and assembly of these macros/blocks into a complete design. You will be running various verification tools at all levels of the design hierarchy to ensure a level of quality. These checks include DRC (design rule check), LVS (layout verification), EM/IR, ERC (Electrical Rule Check) and PERC/ESD (electro-static discharge). Prior experience training and leading junior resources preferred. PREFERRED EXPERIENCE : • Should have detailed knowledge of CMOS circuit and layout concepts/theory. Ideal candidate will have experience in 7nm/5nm/3nm technology nodes. • Should have ability to communicate with various teams to articulate specifications and requirements as they pertain to layout. • Layout design and verification experience using Cadence Virtuoso and Mentor Calibre tools • Relevant or comparable experience doing layout design. • Experience managing junior resources • Knowledge of chip level integration and ESD concepts a plus • Perl programming, TCL and SKILL programming not required, but would be advantages ACADEMIC CREDENTIALS: Electrical/Mechanical Engineering Degree and/or Electronics related Diploma LOCATION: Markham #LI-TB2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.