Circuit Design And Analysis, Annapurna Labs, Cloud Scale Machine Learning

Our Machine Learning Acceleration (MLA) team develops the Inferentia and Trainium SOCs that are used to power today’s AI workloads in datacenters all around the world. As a Circuit & Design Analysis engineer, you’ll collaborate with multiple teams to drive improvements in silicon yield & performance - it’s still Day One here at Amazon!

We’re searching for an experienced Circuit Design & Analysis engineer with a background in custom circuit design & analysis, system level thermal & power analysis with a proven track record of handling challenges at scale. In this role, you’ll be working directly with product engineers, signal & power integrity engineers and physical design experts - defining best practices, driving correlation of pre-silicon simulation of thermal & power integrity to post silicon analysis and developing custom circuits that help raise the bar in implementing state-of-the-art machine learning hardware.


Key job responsibilities
- Design and implement custom cells / IP.
- Develop & run characterization flows for custom cells / IP developed.
- Own integration & post-silicon qualification of IPs like PLL, PCIE, UCIE, HBM, sensors/monitors.
- Develop scripts to automate running analysis and collect reports.
- Develop test-plan and perform measurements in the lab to correlate with simulation data.
- Be a highly-valued member of our start-up like team through excellent collaboration and teamwork with other physical design engineers, product engineers, hardware engineers as well as with the RTL/Arch. teams.

A day in the life
Depending on the state of the project, you may find yourself working on the following:

- Evaluate IPs (like sensors, process monitors) from a 3rd party
- Develop an characterize custom IPs like ganged buffers, custom logic cells for specialized operations (like MACs)
- Work with designers and architects to identify pain-points and areas where custom solutions can improve PPAS
- Do post-silicon quality checks for key IP like PLLs, UCIE/PCIE, HBM
- Do post-silicon power measurements of jitter, sensor calibration, power and correlate with simulation



About the team
We are a start-up like team where no-one says "this is not my job" and you won't find anyone telling you to stay in your lane. This is a fast-paced, intellectually challenging position, and you’ll work with thought-leaders in multiple technology areas. We encourage collaboration and teamwork with multiple teams and engineers including architects, RTL designers, Verification engineers, , Physical Design engineers, Emulation engineers and software engineers.