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DFT/DFX MEMORY SUBSYSTEM ENGINEER
THE ROLE:
The Memory Subsystem team is looking for passionate and experienced DFX engineers for the development of high-speed LPDDRx, DDRx and associated IPs. Be a part of the definition, design, and development phase of industry-leading memory subsystem end to end solution. This opportunity includes DFT/DFX development of the memory subsystem across multiple AMD product lines.
THE PERSON:
Are you looking to take on and tackle advanced engineering challenges with advanced DFT environments with an eye toward reuse across SoCs? We are looking for open minded, flexible, innovative, and creative engineers seeking to join a new team to develop an end-to-end DFX solution for Memory IP/subsystem. End-to-end involves architecture through production. Are you looking for a ground floor opportunity as well as a self-starter with the ability to independently drive tasks to completion? We are also looking for strong interpersonal and communication skills – this position will be working collaboratively across the AMD organization! If this sounds like you, please apply!
DFT/DFX Memory Subsystem Engineer
KEY RESPONSIBILITIES:
- DFT/DFX flow, tooling and infrastructure micro-architecture and development.
- Implementation and verification of DFT architecture and features
- Scan/Jtag/boundary scan insertion and ATPG pattern generation
- Memory BIST logic generation, implementation and verification
- ATPG patterns verification with gate level simulation
- Test coverage and test cost reduction analysis
- Post silicon support to ensure successful bringup and enhance yield learning
PREFERRED EXPERIENCE:
- Master with at least 8 years or Bachelor with at least 10 years working experience in ASIC DFT area.
- Understanding of Design For Test methodologies and DFT verification experience (eg. IEEE1500, JTAG 1149.x, scan, memory BIST, etc)
- Experience with Mentor testkompress and/or Synopsys Tetramax/DFTMAX
- Experience with VCS simulation tool, Perl/Shell scripting and Verilog RTL design
- Excellent oral, written and interpersonal communication skills
- SoC IP knowledge and architectural understanding of the purpose of each IP
ACADEMIC CREDENTIALS:
- Bachelor's degree in Electrical or Computer Engineering and relevant experience, or
- Master's or PhD degree in Electrical or Computer Engineering with relevant experience.
LOCATION:
- Raleigh, NC or Austin, TX
#LI-DD3
#LI-HYBRID
At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
DFT/DFX MEMORY SUBSYSTEM ENGINEER
THE ROLE:
The Memory Subsystem team is looking for passionate and experienced DFX engineers for the development of high-speed LPDDRx, DDRx and associated IPs. Be a part of the definition, design, and development phase of industry-leading memory subsystem end to end solution. This opportunity includes DFT/DFX development of the memory subsystem across multiple AMD product lines.
THE PERSON:
Are you looking to take on and tackle advanced engineering challenges with advanced DFT environments with an eye toward reuse across SoCs? We are looking for open minded, flexible, innovative, and creative engineers seeking to join a new team to develop an end-to-end DFX solution for Memory IP/subsystem. End-to-end involves architecture through production. Are you looking for a ground floor opportunity as well as a self-starter with the ability to independently drive tasks to completion? We are also looking for strong interpersonal and communication skills – this position will be working collaboratively across the AMD organization! If this sounds like you, please apply!
DFT/DFX Memory Subsystem Engineer
KEY RESPONSIBILITIES:
- DFT/DFX flow, tooling and infrastructure micro-architecture and development.
- Implementation and verification of DFT architecture and features
- Scan/Jtag/boundary scan insertion and ATPG pattern generation
- Memory BIST logic generation, implementation and verification
- ATPG patterns verification with gate level simulation
- Test coverage and test cost reduction analysis
- Post silicon support to ensure successful bringup and enhance yield learning
PREFERRED EXPERIENCE:
- Master with at least 8 years or Bachelor with at least 10 years working experience in ASIC DFT area.
- Understanding of Design For Test methodologies and DFT verification experience (eg. IEEE1500, JTAG 1149.x, scan, memory BIST, etc)
- Experience with Mentor testkompress and/or Synopsys Tetramax/DFTMAX
- Experience with VCS simulation tool, Perl/Shell scripting and Verilog RTL design
- Excellent oral, written and interpersonal communication skills
- SoC IP knowledge and architectural understanding of the purpose of each IP
ACADEMIC CREDENTIALS:
- Bachelor's degree in Electrical or Computer Engineering and relevant experience, or
- Master's or PhD degree in Electrical or Computer Engineering with relevant experience.
LOCATION:
- Raleigh, NC or Austin, TX
#LI-DD3
#LI-HYBRID