WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ As an intern, you can immediately contribute to AMD's next generation of technology innovations. We have a dynamic, high-energy work environment filled with expert employees and unique opportunities for developing your career. You can connect with AMD leaders, receive one-on-one mentorship, attend amazing networking events, and much more. With AMD, you can get hands-on experience that will give you a competitive edge in the workforce. Get a jumpstart on an exciting career - apply today! Location Vancouver, Canada Onsite/Hybrid This is a hybrid role (remote & in-office) as the hiring team will require the student to come to the Vancouver office approximately 4 days a week. Program Term September 9, 2024 to April 25, 2025 About the Department The Memory Physical Layer (PHY) is a key component of all AMD products interfacing between DRAM memory and the SoC Controller. It is a key component in the datapath between the CPU and Memory sitting in between Analog and Digital logic domain (Mixed-Signal). Be part of the team that is among the industries most competitive low power DDR PHY’s. The Role As part of the low-power DDR PHY team you will work closely with Architects and Micro-Architects to help collect and analyze data to define the next negation of DDR PHY. You will contribute to studies in understanding our current bottle necks in power, performance and area; and help find solutions to advance the next round of innovation. Interact with Firmware, Verification, Circuit and Physical Design Teams What you’ll be doing RTL coding in Verilog/System Verilog. Simulation, debug design in VCS. Analyze Clock and Reset domain crossings in the design. Contribute with your idea’s on improving the design metrics: Area, Power, Performance. Scripting and automating in Python, Ruby, Shell. What you’ll learn Deep knowledge on the latest DRAM Technologies like LPDDR5x, DDR5. Work on state-of-the-art low power analog mixed-signal(AMS) designs. Advanced clock and power gating strategies and techniques. Hybrid Synchronous and Asynchronous reset design. Power modeling and performance modeling of AMS PHY’s. timing constraints for prime-time, get familiar with synthesis constraints. Requirements Complete 3rd year in 4 year Bachelors degree in Electrical or Computer Engineering or strong performance in 2nd Year. Computer Hardware or Architecture courses Datapath Design, De/Serializer design, Clock Tree design, digital circuit power/area/performance analysis knowledge RTL Coding, Synthesis Constraints and Timing Closure. Clock Domain Crossing. Reset Domain analysis knowledge Familiar with Analog circuit theory, Transmission line effects, termination, signal integrity. One or more of the following scripting languages C/C++ , Python, Ruby, Perl, Java, Javascript, or shell. Digital logic simulator debugging and firmware debugging skills. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.