WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
THE ROLE:
Be part of AMD’s analog/mixed signal IP design team responsible for the design and development of next generation IOs, high speed memory (LPDDR5, DDR5, gDDR6, HBM2/HBM3, chip-to-chip,…) and chip-to-chip Gbps proprietary PHY IP solutions.
KEY RESPONSIBLITIES:
- AMS components circuit and layout architecture and design, and design verification
- Definition, review and sign-off on analog/mixed signal IP top level and component level specifications
- Author AMS blocks circuit and architecture technical specifications, AMS pre-silicon verification, AMS post-silicon characterization/validation test plans.
- Supervise pre-silicon layout, post-silicon characterization and debug.
- Support product bring-up and debug , and Sign-off on test-plans and characterization reports
PREFERRED EXPERIENCE:
- Strong fundamentals and knowledge of mixed signal circuit architecture and design techniques for receiver/transmitter and PLL/DLL/clocking. In-depth knowledge of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques
- Solid experience of designing and architecting analog mixed-signal circuit blocks including DLLs, phase interpolator, low jitter clock distribution, bandgap, biasing circuits, LDO regulators, amplifiers, comparators, high-speed DACs and ADCs. Experience in mixed signal design circuit blocks such as digital/analog DLLs, duty cycle corrector, clock and data recovery, clock mixer, …
- Hand-on design experience in multi-Gbps serial (PCIE, USB, …), parallel high BW memory interface PHY/IOs (DDR4/DDR5, HBM2/HBM3, gDDR5/gDDR6, …) and chip-to-chip links PHY IPs
- Experience in low power design techniques for high speed/custom digital circuit (e.g. CMOS/CML high speed design for counters, dividers, …) design and analysis including transistor level timing sign-off
- Solid understanding of power, area and performance trade-offs in mixed signal IP design
- Design Experience in FinFet advanced CMOS process nodes 16nm/7nm/3nm and below coupled with a solid understanding of transistor device performance and fundamentals
- Proficient in AMS design flows, tools, and methodologies. Familiar with Cadence schematic capture, virtuoso, Spectre and/or HSPICE circuit simulation tools
- Work with project-manager, system architects, IC designers and physical designers to guarantee quality/timely deliverables meeting project’s schedule and technical requirements
- Track record of successfully taking ams designs to production
- Excellent written and verbal communication skills able to operate without direct supervision but also work cross-functionally, cross-geographies collaborating and being part of a multi-disciplinary team in a dynamic/fast paste environment.
- Exhibit strong initiative and ownership of tasks and responsibilities. Seek help proactively as well as share and pass on knowledge
ACADEMIC CREDENTIALS:
- BS or MS or PhD in Electrical, Computer Engineering or related equivalent
LOCATION: San Jose, California
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Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
THE ROLE:
Be part of AMD’s analog/mixed signal IP design team responsible for the design and development of next generation IOs, high speed memory (LPDDR5, DDR5, gDDR6, HBM2/HBM3, chip-to-chip,…) and chip-to-chip Gbps proprietary PHY IP solutions.
KEY RESPONSIBLITIES:
- AMS components circuit and layout architecture and design, and design verification
- Definition, review and sign-off on analog/mixed signal IP top level and component level specifications
- Author AMS blocks circuit and architecture technical specifications, AMS pre-silicon verification, AMS post-silicon characterization/validation test plans.
- Supervise pre-silicon layout, post-silicon characterization and debug.
- Support product bring-up and debug , and Sign-off on test-plans and characterization reports
PREFERRED EXPERIENCE:
- Strong fundamentals and knowledge of mixed signal circuit architecture and design techniques for receiver/transmitter and PLL/DLL/clocking. In-depth knowledge of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques
- Solid experience of designing and architecting analog mixed-signal circuit blocks including DLLs, phase interpolator, low jitter clock distribution, bandgap, biasing circuits, LDO regulators, amplifiers, comparators, high-speed DACs and ADCs. Experience in mixed signal design circuit blocks such as digital/analog DLLs, duty cycle corrector, clock and data recovery, clock mixer, …
- Hand-on design experience in multi-Gbps serial (PCIE, USB, …), parallel high BW memory interface PHY/IOs (DDR4/DDR5, HBM2/HBM3, gDDR5/gDDR6, …) and chip-to-chip links PHY IPs
- Experience in low power design techniques for high speed/custom digital circuit (e.g. CMOS/CML high speed design for counters, dividers, …) design and analysis including transistor level timing sign-off
- Solid understanding of power, area and performance trade-offs in mixed signal IP design
- Design Experience in FinFet advanced CMOS process nodes 16nm/7nm/3nm and below coupled with a solid understanding of transistor device performance and fundamentals
- Proficient in AMS design flows, tools, and methodologies. Familiar with Cadence schematic capture, virtuoso, Spectre and/or HSPICE circuit simulation tools
- Work with project-manager, system architects, IC designers and physical designers to guarantee quality/timely deliverables meeting project’s schedule and technical requirements
- Track record of successfully taking ams designs to production
- Excellent written and verbal communication skills able to operate without direct supervision but also work cross-functionally, cross-geographies collaborating and being part of a multi-disciplinary team in a dynamic/fast paste environment.
- Exhibit strong initiative and ownership of tasks and responsibilities. Seek help proactively as well as share and pass on knowledge
ACADEMIC CREDENTIALS:
- BS or MS or PhD in Electrical, Computer Engineering or related equivalent
LOCATION: San Jose, California
#LI-TB2
#HYBRID