WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SILICON DESIGN VERIFCATION ENGINEER THE ROLE: As a member of verification team, you will work with leading industry tools and design & verification concepts to achieve full functional, performance & power verification closure on a variety of digital design blocks which are a part of the Graphics Core IP (GFXIP). You will work closely with architects, designers and other design verification engineers to author test plan for pre-silicon verification, planning & development of test benches to exercise the design, write detailed test plans to cover new blocks and features, drive the development of test-cases and cove points or assertions to achieve verification closure. THE PERSON: Besides a passion for modern, complex processor architecture, digital design, and verification in general, these personal qualities are essential to success in this role: Excellent analytical and organizational skills; Outstanding verbal & written communication A self-starter who excels at driving tasks to completion and enabling collaboration amongst team members You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems KEY RESPONSIBILITIES: Work closely with the architect, RTL designers and other verification engineers to achieve verification closure within project schedules Be responsible for functional, power and performance verification of a block, including verification planning, execution and DV closure Develop and execute test and coverage plans to ensure the functional, performance and power completeness Create, reuse and debug test benches, verification components and tests for verification of the design Be expected to adopt the evolving verification methodologies used in the industry to functionally verify increasingly more complex SoC designs within aggressive, market-driven schedules, and work within the existing verification infrastructure on currently active projects PREFERRED EXPERIENCE: Verification experience on large ASIC development projects Solid understanding of Computer Architecture and Digital Design concepts Very strong background in Verilog, System Verilog, C/C++/OOO coding techniques Experience working with UVM, OVM or equivalent Experience with constrained random verification, functional coverage and assertions Experience with formal verification is an added advantage Familiarity with scripting languages: perl/tcl/ruby/Bash/python Experience working with industry standards tools such Synopsys VCS, VC Formal, DVE, Verdi, GDB or equivalent Strong analytical skills and attention to detail ACADEMIC CREDENTIALS: Bachelor’s (or preferably Master’s) degree in Computer Engineering, Computer Science, Electrical Engineering or similar #LI-CJ2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.