Sr. IP Verification Engineer (Sr. Silicon Design Engineer)

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SENIOR SILICON DESIGN ENGINEER THE ROLE: We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. THE PERSON: We are seeking a highly skilled and motivated Verification Engineer with 5+ years of experience to join our team. The ideal candidate will have a strong background in SystemVerilog (SV), Universal Verification Methodology (UVM), and hands-on experience in IP verification. You will play a key role in ensuring the quality and functionality of complex IP designs. KEY RESPONSIBILITIES: Develop and execute verification plans for IP-level verification. Write and implement test cases using SystemVerilog and UVM methodologies. Perform functional and coverage-driven verification, including constrained random testing and assertion-based verification. Debug and troubleshoot complex IP designs, ensuring proper functionality. Create, manage, and track the verification test plans, including functional coverage and assertions. Collaborate closely with design teams to understand specifications and ensure comprehensive verification coverage. Analyze simulation results, debug failures, and work with designers to resolve issues. Contribute to the development of verification environments and continuously improve verification methodologies. Ensure that all verification tasks meet project timelines and quality standards. Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering, or related field. 5+ years of experience in verification, with a strong focus on IP verification. Strong knowledge of SystemVerilog and UVM. Hands-on experience in writing and executing test plans, developing constraint random tests, and working with assertions and functional coverage. Solid understanding of the verification flow, including regression setup, debugging, and coverage closure. Strong problem-solving and debugging skills. Excellent communication skills and the ability to collaborate effectively with cross-functional teams. Self-motivated, detail-oriented, and capable of working independently. PREFERRED EXPERIENCE: Experience with scripting languages (e.g., Python, Perl) for automation. Familiarity with modern verification tools and methodologies. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering If you are passionate about verification and eager to take on new challenges in a dynamic environment, we encourage you to apply! #LI-PM2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.