Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.
We are looking for a person ready to take up the challenge of working in a high-profile project where we integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better.
In this role, you will develop and customize chiplets, including but not limited to chiplet die-to-die interconnect.
This role is hybrid, based out of Tokyo, Japan.
We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.
Responsibilities:
- Work on front-end RTL integration of CPU cores, AI cores, interface IPs and high-speed I/Os
- Write specifications, micro-architecture, create RTL implementation plan, implement the plan based on the micro-architecture specification
- Work closely with verification, emulation and physical design teams to transform RTL to GDSII
- Work on post-silicon validation activities
- Contribute to design methodologies driving continuous improvement for front-end design
Experience & Qualifications:
- Bachelor, Master or PhD degree in electrical, computer engineering or computer science
- At least 5 years industry experience in logic design
- Knowledge of CPU architecture, SoC architecture
- Experience with CPU/SoC RTL implementation with Verilog/SystemVerilog
- Experience with high-speed I/O controllers & PHY integration, such as PCI-express, DDR, HBM or UCIe
- Proficiency in RTL design and front-end tools and simulators (VCS/IUS), CDC/Lint checkers
- Proficiency in physical design tools like synthesis (DC), static timing checks (STA), DFT
- Good problem solving skills, organizational and communication skills
- Good English language skills (written and spoken)
Nice to Have:
- Experience / Knowledge of RISC-V Architecture
- Exposure to chiplet integration
- Understanding of emulation flows
- Fluency in Japanese
- Japanese work visa
Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.
Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set by the U.S. government.
As this position will have direct and/or indirect access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and supporting documentation will be required and considered as a condition of employment.
If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government. If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded.