WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ THE ROLE: The AMD Cores Methodology Team is seeking a new team member to own the design, specification, and implementation of future core clock macros and methodologies to help create the next generation Zen CPU core for future iterations of Epyc™ servers and Ryzen™ desktop/notebook computers. As a member of our team, you’ll be responsible for collaborating with experts across various aspects of the CPU design flow in the most advanced process nodes. In our group, your work will have an immediate impact on multiple ongoing projects. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Develop initial circuit schematics and work closely with layout designers to drive designs to completion (including physical verification and backend/reliability flows), taking into account dynamic/static power consumption and design rout ability. Drive design and layout reviews to ensure quality of deliverables and mitigate overall risk. Perform circuit analysis incorporating process variation and IR impact. Deliver detailed specifications & documentation. Work closely with various disciplines (e.g. Layout, Logical Design, Physical Design, and Design Verification) to ensure successful cross-team engagement and high-quality execution. PREFERRED EXPERIENCE: Knowledge of high performance and low power circuit design, electrical analysis and PPA optimization. Strong understanding of the impact of variation on design performance Solid knowledge of industry-standard tools and practices (e.g., HSPICE simulator, Cadence design environment) Familiarity with Perl, Python, Tcl and/or MATLAB Familiarity of Verilog syntax, liberty models and variation format. Experience with Unix/Linux environments Great team player with good verbal and written communication skills ACADEMIC CREDENTIALS: Bachelors or Masters degree in Computer Engineering/Electrical Engineering. LOCATION: Santa Clara, CA #LI-MF2 #LI-HYBRID At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.